Monday, April 23, 2007

Advanced Thin Silicon Solar Cells - Tom Rust's Photon Energy Systems of OAKLAND

Photon Energy Systems

Photon Energy Systems
has developed a process for making thin LT 50microns thickness and 3x->5X reduction in single crystal silicon wafers required - the major cost in modules is the silicon. Photon Energy Systems technology reduces the silicon cost by a factor of ~5X over conventional silicon wafers, and ~3x over unusual ultrathin fragile wafers, with fragility of the the ultrathin Photon Energy chip cells, not an issue at all due to the tiny chip size and simple methods of handling them.
2) 20X reduction in cell processing capital costs over conventional wafer cells. This allows smaller capital expenditures in processing equipment to have much greater throughput and reduces cell costs.
3) Cell output stability of single crystal silicon - near constant over life, versus commonly observed large power degradation of amorphous silicon thin film solar cells.

The manufacturing technique is comprised of 2 major manufacturing steps:

1) Thin Silicon Sub-Cells - this process uses conventional Cz or Fz single crystal silicon boules, cuts the boules into thick (typically 2mm) wafers, and then processes them into tens of thousands of thin cells. By processing the wafers from a small surface area to a very large surface area in each wafer, the wafer processing resources needed to make each module is reduced by a factor of more than 20X.

2) Sub-Module (pseudo wafer) - the cells are assembled using our unique parallel assembly tools into sub modules, similar in size to conventional solar cells. These sub modules are then formed into larger panels - assembled, laminated and framed into conventional solar panels.


Sub-module (pseudo wafer) of thin (50micron) single crystal silicon PhotoVoltaic cells
(Top and bottom bars are solderable outputs)

Typical efficiency for Cz made cells - 15%

For More Info - contact
Tom Rust, President
Photon Energy Systems
tel - (510) 912-4662 fax - (510) 339-9636


Blogger ask said...

See ESLR for real reduction of silicon use.
Also, thin film has reduced conversion ratios.

3:26 PM  

Post a Comment

Links to this post:

Create a Link

<< Home

Enter your email address:

Delivered by FeedBurner

Subscribe to Wendmans Views on Nanotech by Email